Work Experience

Vicharak

GATI – FPGA-based Edge ML Accelerator
• Architected components of the GATI – FPGA-based Edge ML Accelerator, contributing to compute flow, operator execution strategies, and overall hardware-software co-design.
• Designed compute approaches for multiple operators including convolution, pooling, activation functions, and concatenation, optimized for systolic-array–based inference.
• Developed an algorithm enabling efficient execution of large-kernel convolutions (5×5 to 11×11)on fixed hardware arrays without accuracy degradation.
• Built the C++ compiler, simulator, and runtime stack (GATICC) enabling end-to-end deployment of ONNX models on the GATI accelerator, used for model validation, performance analysis, and FPGA–software debugging.
• Achieved 80–100 ms inference latency on representative classification and object detection models using INT8 quantized CNNs.
• Currently leading GATICC software development, driving operator research, model integration and performance improvements

Indian Institute of Technology, Delhi

• Objective: Development of Super-app for Indian elderly population with voice-controlled features
• Developed an Android application using Kotlin to facilitate audio recording and submission to a centralized database, creating a robust dataset for training the Al system
• Conducted research on existing Al systems for speech recognition, with a specific focus on AWS Machine Learning-based Speech Recognition Systems, to be integrated in the app’s backend